Jordi Blasco organizes the workshop "Introduction to Intel Phi". SIE helps Jordi by allowing remote use of the SIE Ladón 32C machine based on the Intel 4600 platform and the Intel Phi 5110p card.
Jordi Blasco is HPC Manager at New Zealand eScience Infrastructure.
The Intel Xeon Phi coprocessor is a card for massive computing applications with a high compute to data access ratio. It is composed of 61 x86 cores and each one is capable of switching between 4 threads by hardware, which results in the possibility of handling 244 threads or executions.
Each core consists of a slow processor with a few extensions (Pentium 4 type), x86 pipeline, a local L1 and L2 cache, and an independent vector processing unit (VPU).
More information about this course at:
http://www.eresearch.org.nz/event/eresearch-nz-2013/introduction-to-intel-phi-workshop